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Martin Bücker

Background

I joined the Nokia Research Center Bochum in 1999 as a research engineer after receiving my diploma in electrical engineering from University of Dortmund, Germany. I take and develop abstract ideas and concepts and bring them to efficient implementations. This includes the re-formulation of algorithms, the development of systems, simulation environments and design flows, the definition of hardware accelerators and implementation on processor platforms, ASICs or FPGAs. My work includes university cooperations and I have been leading work packages in the national funded projects IP² and LEMOS in Germany.

I am member of the Physical Mobility Applications research team and currently working on the implementation of visual processing and object recognition in the automotive area.

Patent

EP1224532: M. Otte, M. Bücker, J. Götze: "Complex-valued CORDIC-like Methods for Signal Processing Tasks"

Publications

M. Otte, M. Bücker, J. Götze: "Complex Cordic-like Algorithms for Linearly Constrained MVDR Beamforming", 2000 International Zurich Seminar on Broadband Communications, 15-17 Feb 2000, Zurich, Switzerland.

Bernhard Oelkrug, Martin Bücker, Dirk Uffmann, Axel Dröge, Jörg Brakensiek, Mohsen Darianian: "Programmable Hardware Accelerator for Universal Telecommunication Applications", 2nd Workshop on Software Radios, March 2002, Karlsruhe, Germany.

Hendrik Lange, Martin Bücker, Ortwin Franzen, Hartmut Schröder: "Reconfigurable Multiply-Accumulate-Based Processing Element", IEEE Workshop on Heterogeneous reconfigurable Systems on Chip, April 2002, Hamburg, Germany.

S. Roy, M. Buecker, W. Wilhelm, E. S. Panwar, "Reconfigurable hardware accelerator for a universal Reed Solomon Codec", 1st IEEE International Conference on Circuits and Systems for Communication (ICCSC 2002), June 2002, St. Petersburg, Russia.

Jörg Brakensiek, Bernhard Oelkrug, Martin Bücker, Dirk Uffmann, Axel Dröge: "Reconfigurable Multi-standard Terminal for Heterogeneous Networks", IEEE Radio and Wireless conference (RAWCON 2002), August 2002, Boston, USA.

Jörg Brakensiek, Bernhard Oelkrug, Martin Bücker, Dirk Uffmann, Axel Dröge, Mohsen Darianian, Marius Otte: "Software Radio Approach for Re-configurable Multi-standard Radios", 13th IEEE International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC 2002), September 2002, Lisbon, Portugal.

Marius Otte, Martin Bücker, Jürgen Götze: "Matrix based Signal Processing on a Reconfigurable Hardware Accelerator", IEEE 10th Digital Signal Processing Workshop, October 2002, Pine Mountain, Georgia, USA.

Jörg Brakensiek, Dirk Uffmann, Martin Bücker, Bernhard Oelkrug: "Optimized Algorithm Specific Instruction Set Processing (ASIP) inside SDR Terminals". 48. Internationales Wissenschaftliches Kolloquium, September 2003, Ilmenau, Germany.

B. Heyne, J. Götze, M. Bücker: "Implementation of a Cordic Based FFT on a Reconfigurable Hardware Accelerator", Karlsruhe Workshop on Software Radios, 2004, Karlsruhe, Germany.

M. Bücker: “Analyse und Charakterisierung von Verbindungsleitungen in 65nm CMOS”, edacentrum: Kooperationsworkshop zum Thema Verbindungsstrukturen, December 2005, Bochum, Germany.

M. Schämann, M. Bücker, S. Hessel, U. Langmann: "Channel Equalization in HSDPA Receivers: Trade-Off between Performance and Complexity with a Variable Oversampling", 63rd IEEE Vehicular Technology Conference (VTC-06 Spring), May 2006, Melbourne, Australia.

A. Momin, R. Wittmann, M. Bücker, W. Schardein: "Planar Transmission Line Structures as Possible On-Chip Interconnects in Deep Sub-Micron (DSM) Process", 10th IEEE Workshop on Signal Propagation on Interconnects (SPI 06), May 2006, Berlin, Germany.

M. Bücker: Data Traffic Modelling for Communication and Memory Architecture Design of a Multiprocessor System-on-Chip, LEMOS-Workshop im Rahmen des Ekompass-Workshops, May 2006, Hannover, Germany.

K. Strohmenger, M. Bücker: "Token-based OSCI SystemC Simulator for Architecture Dimensioning of a Multiprocessor SoC", Forum on Specification & Design Languages (FDL 06), September 2006, Darmstadt, Germany.

M. Schämann, M. Bücker, S. Hessel und U. Langmann: "Power Optimization of Digital Baseband WCDMA Receiver Components on Algorithmic and Architectural Level", U.R.S.I. Kleinheubacher Tagung 2006, Miltenberg, Germany.

M. Schämann, M. Bücker, S. Hessel und U. Langmann: "Power Optimization of Digital Baseband WCDMA Receiver Components on Algorithmic and Architectural Level", Advances in Radio Science - Kleinheubacher Berichte 2006

M. Bücker: Data Traffic Modelling for Communication and Memory Architecture Design of a Multiprocessor System-on-Chip, Kooperationsworkshop System-Planning, November 2006, Hannover, Germany.

M. Schämann, M. Bücker, S. Hessel und U. Langmann: "Low Power Design on Algorithmic and Architectural Level: A Case Study of an HSDPA Baseband Digital Signal Processing System", DATE 2007, Nice, France.

Martin Bücker: "New Applications on Nomadic Devices in Automotive Environment with Traffic Sign Recognition as an Use Case", Forum Nokia Tech Days, May 2007, St. Petersburg, Russia

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